CVE-2026-53056 (GCVE-0-2026-53056)
Vulnerability from cvelistv5
Published
2026-06-24 16:30
Modified
2026-06-24 16:30
Severity ?
Summary
In the Linux kernel, the following vulnerability has been resolved: drm/msm/dpu: fix mismatch between power and frequency During DPU runtime suspend, calling dev_pm_opp_set_rate(dev, 0) drops the MMCX rail to MIN_SVS while the core clock frequency remains at its original (highest) rate. When runtime resume re-enables the clock, this may result in a mismatch between the rail voltage and the clock rate. For example, in the DPU bind path, the sequence could be: cpu0: dev_sync_state -> rpmhpd_sync_state cpu1: dpu_kms_hw_init timeline 0 ------------------------------------------------> t After rpmhpd_sync_state, the voltage performance is no longer guaranteed to stay at the highest level. During dpu_kms_hw_init, calling dev_pm_opp_set_rate(dev, 0) drops the voltage, causing the MMCX rail to fall to MIN_SVS while the core clock is still at its maximum frequency. When the power is re-enabled, only the clock is enabled, leading to a situation where the MMCX rail is at MIN_SVS but the core clock is at its highest rate. In this state, the rail cannot sustain the clock rate, which may cause instability or system crash. Remove the call to dev_pm_opp_set_rate(dev, 0) from dpu_runtime_suspend to ensure the correct vote is restored when DPU resumes. Patchwork: https://patchwork.freedesktop.org/patch/710077/
References
Impacted products
Vendor Product Version
Linux Linux Version: b0530eb1191307e9038d75e5c83973a396137681
Version: b0530eb1191307e9038d75e5c83973a396137681
Version: b0530eb1191307e9038d75e5c83973a396137681
Version: b0530eb1191307e9038d75e5c83973a396137681
Version: b0530eb1191307e9038d75e5c83973a396137681
Version: b0530eb1191307e9038d75e5c83973a396137681
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{
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            "drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c"
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      "descriptions": [
        {
          "lang": "en",
          "value": "In the Linux kernel, the following vulnerability has been resolved:\n\ndrm/msm/dpu: fix mismatch between power and frequency\n\nDuring DPU runtime suspend, calling dev_pm_opp_set_rate(dev, 0) drops\nthe MMCX rail to MIN_SVS while the core clock frequency remains at its\noriginal (highest) rate. When runtime resume re-enables the clock, this\nmay result in a mismatch between the rail voltage and the clock rate.\n\nFor example, in the DPU bind path, the sequence could be:\n  cpu0: dev_sync_state -\u003e rpmhpd_sync_state\n  cpu1:                                     dpu_kms_hw_init\ntimeline 0 ------------------------------------------------\u003e t\n\nAfter rpmhpd_sync_state, the voltage performance is no longer guaranteed\nto stay at the highest level. During dpu_kms_hw_init, calling\ndev_pm_opp_set_rate(dev, 0) drops the voltage, causing the MMCX rail to\nfall to MIN_SVS while the core clock is still at its maximum frequency.\nWhen the power is re-enabled, only the clock is enabled, leading to a\nsituation where the MMCX rail is at MIN_SVS but the core clock is at its\nhighest rate. In this state, the rail cannot sustain the clock rate,\nwhich may cause instability or system crash.\n\nRemove the call to dev_pm_opp_set_rate(dev, 0) from dpu_runtime_suspend\nto ensure the correct vote is restored when DPU resumes.\n\nPatchwork: https://patchwork.freedesktop.org/patch/710077/"
        }
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      "providerMetadata": {
        "dateUpdated": "2026-06-24T16:30:01.694Z",
        "orgId": "416baaa9-dc9f-4396-8d5f-8c081fb06d67",
        "shortName": "Linux"
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        {
          "url": "https://git.kernel.org/stable/c/bc1dccc518cc5ab5140fba06c27e7188e0ed342b"
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      "title": "drm/msm/dpu: fix mismatch between power and frequency",
      "x_generator": {
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    "assignerShortName": "Linux",
    "cveId": "CVE-2026-53056",
    "datePublished": "2026-06-24T16:30:01.694Z",
    "dateReserved": "2026-06-09T07:44:35.381Z",
    "dateUpdated": "2026-06-24T16:30:01.694Z",
    "state": "PUBLISHED"
  },
  "dataType": "CVE_RECORD",
  "dataVersion": "5.2"
}


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